Digital communication is well known in the art. One well known communication standard which is proposed and in some areas is being implemented is the ISDN network standard. The ISDN network standard is a digital communication protocol for a public network (such as one operated by local telephone companies). In the United States, the ISDN network is a digital communication network operating at the rate of 64 kilobits per second per channel. Each channel is called a B channel.
Computers are well known in the art. Typically, however, they operate at a much higher frequency than public communication networks. Thus, for example, computers can store and retrieve data at the rate of millions of bits per second.
As it becomes increasingly desirable to connect computers directly onto public digital communication networks, such as an ISDN network, methods and apparatuses must be provided to interface the computer with the communication network. One prior art technique is disclosed in U.S. Pat. No. 4,775,987. In that patent, a single digital data stream from a source (such as a computer) is supplied to a distributor which supplies a portion of the data cyclically to a plurality of channels. Each of the channels operates at a rate slower than the rate of the single stream of data supplied to the distributor. In this manner, the transmission of data over the plurality of channels, in total, is or exceeds the rate of the single stream of digital data from the source to the distributor.
The problem with such an apparatus is that each of the channels which connects the communication session from one location to another is subject to a different amount of delay. Since these are public access channels, the user cannot control the delay nor a prior determine the amount of delay in each channel. At the receiving end, the delays must be compensated. In U.S. Pat. No. 4,775,987, there is disclosed a technique whereby an adjustable delaying means (shift register) is interposed between each channel and a reassembler. The output of the reassembler is connected to a control unit which controls each of the adjustable shift registers. The transmitting unit first transmits synchronizing data to the receiving unit. Based upon the synchronizing data, the control unit calculates the amount of delay in each of the channels and adjusts the adjustable shift registers, accordingly.
It is believed that this arrangement is expensive to implement in that a shift register must be provided for each of the channels. Further, in the device disclosed in U.S. Pat. No. 4,775,987, once a communication session has begun, the number of channels used for the communication session is fixed and is not varied until the communication session is terminated.